Leakage current paths in transformer-less single-phase inverter topology with PWM mitigation /

This dissertation studies single-phase transformer-less inverter topology for exploring the issue of common mode (CMV) voltage development, suggesting technique for reducing the resulting leakage current. The technique of AC and DC decoupling is explained; suggesting how such approaches address the...

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Bibliographic Details
Main Author: Khan, Md. Noman Habib
Format: Thesis
Language:English
Published: Kuala Lumpur : Kulliyyah of Engineering, International Islamic Unniversity Malaysia, 2014
Subjects:
Online Access:Click here to view 1st 24 pages of the thesis. Members can view fulltext at the specified PCs in the library.
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040 |a UIAM  |b eng 
041 |a eng 
043 |a a-my--- 
050 |a TK1087 
100 1 |a Khan, Md. Noman Habib 
245 1 |a Leakage current paths in transformer-less single-phase inverter topology with PWM mitigation /  |c by Md. Noman Habib Khan 
260 |a Kuala Lumpur :  |b Kulliyyah of Engineering, International Islamic Unniversity Malaysia,  |c 2014 
300 |a xv, 90 leaves :  |b ill. ;  |c 30cm. 
502 |a Thesis (MSEE)--International Islamic University Malaysia, 2014. 
504 |a Includes bibliographical references (leaves 84-88). 
520 |a This dissertation studies single-phase transformer-less inverter topology for exploring the issue of common mode (CMV) voltage development, suggesting technique for reducing the resulting leakage current. The technique of AC and DC decoupling is explained; suggesting how such approaches address the CMV problem, although reducing the leakage current considerably but generating the problem in the form of more harmonic generation and at the cost of smaller voltage output. The suggested technique in this work is basically a modified topology by adding on an additional switch along with a diode. The diode is added for dealing the issue of CMV further effectively. A bridge-based transformer-less inverter topology is proposed, producing simulations results with preferential advantage. The technique is further verified by adding a series resistance to show how the leakage current is reduced for different resistive values. Moreover, output voltage is shown for some transformer-less topologies with reduced leakage current and that is verified and compared with the topology for common leakage path in this proposed topology. On the other hand, different paths are shown and as well as leakage current for those paths is also shown for both 50% and 75% duty ratio conditions with values. 
596 |a 1 
655 7 |a Theses, IIUM local 
690 |a Dissertations, Academic  |x Department of Electrical and Computer Engineering  |z IIUM 
710 2 |a International Islamic University Malaysia.  |b Department of Electrical and Computer Engineering 
856 4 |u http://studentrepo.iium.edu.my/handle/123456789/4953  |z Click here to view 1st 24 pages of the thesis. Members can view fulltext at the specified PCs in the library. 
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