Single Event Transient effects on CMOS Active Pixel Sensors /
CMOS Active Pixel Sensors (APS) are widely used especially in satellites. The applications of CMOS APS in the space caused them to be vulnerable to the radiation. The radiation degraded the images captured by displaying the bright spots in the image captured as the high transient currents generated....
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English |
| Published: |
Kuala Lumpur :
Kulliyyah of Engineering, International Islamic University Malaysia,
2017
|
| Subjects: | |
| Online Access: | Click here to view 1st 24 pages of the thesis. Members can view fulltext at the specified PCs in the library. |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | CMOS Active Pixel Sensors (APS) are widely used especially in satellites. The applications of CMOS APS in the space caused them to be vulnerable to the radiation. The radiation degraded the images captured by displaying the bright spots in the image captured as the high transient currents generated. These radiation effect is known as Single Event Transient (SET). The SET is considered as common soft error as it will affect the circuit temporarily. However, as the technology goes smaller the SET effect becomes a common phenomenon due to lower operating voltage and nodal capacitance. Given that radiation doses are hazardous, dangerous and the cost to conduct the experiment are very expensive, simulation becomes a better alternative in order to have a better understanding on the effect of SET. Silvaco Gateway is a powerful software that able to demonstrate the current responses towards the energetic particles in circuit level. The 3T and 4T CMOS APS with technology from 130nm scaling down to 32nm were simulated with various Linear Energy Transfer (LET) magnitudes (3.3 to 67.7MeV.cm2/mg). This research aim to characterise the SET effects and to investigate effects of technology scaling to 3T and 4T. The LET magnitudes is the energy transfer for certain ions. These SET effects are characterised into peak current amplitude, excess drain current, charge collection and total charge collection. After simulated with LET magnitudes of 67.7MeV.cm2/mg, the peak current of 130nm 3T CMOS APS has the highest peak of 37.07µA at 4µs. This stated an increment of 445.07% from the reference signal. However, the 32nm 3T CMOS APS showed the highest excess drain current of all technology and architectures. There is 5.86% increment of excess drain current compared to 45nm technology and 4.64% increment compared to the same technology for 4T. In term of charge collection, all of the devices are expected to display the bright spots when 6.4MeV.cm2/mg is simulated as the current transient exceeded more than 20% of the reference signal. However, 4T architecture has more tolerant to radiation as it has 1.25 times less charges collection at corresponding time compare to 3T architecture. The effect of technology scaling of CMOS APS showed that 4T has higher radiation-hardness compared to 3T. Even the lowest LET, 4T have charge collection of 1.44 times lower than 3T. |
|---|---|
| Physical Description: | xv, 97 leaves : illustrations ; 30cm. |
| Bibliography: | Includes bibliographical references (leaves 82-84). |