An Architecture and Logic Design of a Discrete Wavelet Transform Processor

An Architecture and Logic Design of a Discrete Wavelet Transform Processor

Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thes...

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Main Author: Lim, Soon Chieh
Format: Thesis
Published: 2005
Subjects:
QA299.6-433 Analysis
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id my-mmu-ep.143
record_format uketd_dc
spelling my-mmu-ep.1432010-02-17T08:30:10Z An Architecture and Logic Design of a Discrete Wavelet Transform Processor 2005 Lim, Soon Chieh QA299.6-433 Analysis Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT. 2005 Thesis http://shdl.mmu.edu.my/143/ http://vlib.mmu.edu.my/diglib/login/dlusr/login.php masters Multimedia University Research Library
institution Multimedia University
collection MMU Institutional Repository
topic QA299.6-433 Analysis
spellingShingle QA299.6-433 Analysis
Lim, Soon Chieh
An Architecture and Logic Design of a Discrete Wavelet Transform Processor
description Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT.
format Thesis
qualification_level Master's degree
author Lim, Soon Chieh
author_facet Lim, Soon Chieh
author_sort Lim, Soon Chieh
title An Architecture and Logic Design of a Discrete Wavelet Transform Processor
title_short An Architecture and Logic Design of a Discrete Wavelet Transform Processor
title_full An Architecture and Logic Design of a Discrete Wavelet Transform Processor
title_fullStr An Architecture and Logic Design of a Discrete Wavelet Transform Processor
title_full_unstemmed An Architecture and Logic Design of a Discrete Wavelet Transform Processor
title_sort architecture and logic design of a discrete wavelet transform processor
granting_institution Multimedia University
granting_department Research Library
publishDate 2005
_version_ 1747829092184489984

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