Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications

This thesis extends the applicability of BDDs for Pass transistor Logic (PTL) synthesis since the Binary Decision Diagram (BDDs) are the state-of-the-art data structure for the representation and manipulation of Boolean functions in the area of Very Large Scale Integration (VLSI) CAD. A Reversed BDD...

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Main Author: Bhuvaneswari, Thangavel
Format: Thesis
Published: 2012
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id my-mmu-ep.5588
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spelling my-mmu-ep.55882014-06-17T03:48:39Z Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications 2012-09 Bhuvaneswari, Thangavel TK7800-8360 Electronics This thesis extends the applicability of BDDs for Pass transistor Logic (PTL) synthesis since the Binary Decision Diagram (BDDs) are the state-of-the-art data structure for the representation and manipulation of Boolean functions in the area of Very Large Scale Integration (VLSI) CAD. A Reversed BDD technique is proposed first and then a Reversed BDD based Pass Transistor Logic (PTL) synthesis is presented for low power and high performance circuits without exploiting the canonical property of BDDs. The Reversed BDD technique performs better in terms of area, delay and power dissipation, due to the regularity reduced critical path, less interconnection wires, a multiplexer-based construction of PTL circuits and less switching activities. 2012-09 Thesis http://shdl.mmu.edu.my/5588/ http://library.mmu.edu.my/diglib/onlinedb/dig_lib.php phd doctoral Multimedia University Faculty of Engineering and Technology
institution Multimedia University
collection MMU Institutional Repository
topic TK7800-8360 Electronics
spellingShingle TK7800-8360 Electronics
Bhuvaneswari, Thangavel
Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications
description This thesis extends the applicability of BDDs for Pass transistor Logic (PTL) synthesis since the Binary Decision Diagram (BDDs) are the state-of-the-art data structure for the representation and manipulation of Boolean functions in the area of Very Large Scale Integration (VLSI) CAD. A Reversed BDD technique is proposed first and then a Reversed BDD based Pass Transistor Logic (PTL) synthesis is presented for low power and high performance circuits without exploiting the canonical property of BDDs. The Reversed BDD technique performs better in terms of area, delay and power dissipation, due to the regularity reduced critical path, less interconnection wires, a multiplexer-based construction of PTL circuits and less switching activities.
format Thesis
qualification_name Doctor of Philosophy (PhD.)
qualification_level Doctorate
author Bhuvaneswari, Thangavel
author_facet Bhuvaneswari, Thangavel
author_sort Bhuvaneswari, Thangavel
title Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications
title_short Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications
title_full Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications
title_fullStr Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications
title_full_unstemmed Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications
title_sort binary decision diagram (bdd) based new methodologies for performance analysis of pass transistor logic (ptl) synthesis and other applications
granting_institution Multimedia University
granting_department Faculty of Engineering and Technology
publishDate 2012
_version_ 1747829581187907584