Characterisation and Optimisation of Fine Pitch Contactor for Integrated Circuit Packaging
The beginning of this study introduces the contactor characterisation methodology for parasitic inductance and capacitance extraction for IC packaging. The second section of this study explains the challenges of designing the fine pitch contactor and test board. The design optimisation for fine pit...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Published: |
2016
|
| Subjects: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | The beginning of this study introduces the contactor characterisation methodology for parasitic inductance and capacitance extraction for IC packaging. The second section of this study explains the challenges of designing the fine pitch contactor and test board. The design optimisation for fine pitch contactor will be recommended at the end of thesis. Test contactor is part of the test tooling used in manufacturing for repeatability electrical testing. The main electrical conduction path is through the test contactor pin. When current flows through these contactor pins, the inductance and capacitance are generated along the electrical path. These parasitic inductance and capacitance contribute the channel losses and change the characteristic impedance of transmission line. As test contactor is part of the test tooling interfacing between package and test board, the signal integrity of the test contactor design must be well taken care. Any changes on the design parameters will affect the performance of test contactor. This work presents the inductance and capacitance characterisation methodology using ANSYS Q3D to study the impact of design parameters to the test contactor performance. |
|---|