Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter

Digital Finite Impulse Responses (FIR) filter plays a significant role in Digital Signal Processing (DSP). FIR digital filters block certain components of the input frequency. Subsequently, they convey the original signal with the eliminated components to the filter’s output. The advantages of the...

Full description

Saved in:

Bibliographic Details
Main Author:	Subramaniam, Shahmini
Format:	Thesis
Published:	2019
Subjects:	TK7885-7895 Computer engineering Computer hardware
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-mmu-ep.7736
record_format	uketd_dc
spelling	my-mmu-ep.77362020-09-21T05:35:06Z Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter 2019-02 Subramaniam, Shahmini TK7885-7895 Computer engineering. Computer hardware Digital Finite Impulse Responses (FIR) filter plays a significant role in Digital Signal Processing (DSP). FIR digital filters block certain components of the input frequency. Subsequently, they convey the original signal with the eliminated components to the filter’s output. The advantages of the FIR’s digital filters include linear phase shift, low coefficient sensitivity, and stability. Researchers have thoroughly researched the power dissipation, and efficiency-performance of the FIR digital filters, as they utilize the arithmetic operations, including addition, and multiplication in the DSP system. Adder is a crucially important arithmetic operation which is employed as part of the building block in the FIR filter. In this study, the employment of the power-efficient Pass Transistor Logic (PTL) alongside Negative Channel Metal Oxide Semiconductors (NMOS) was proposed and presented. NMOS transistors were employed for the implementation of digital logic circuits. The higher speed associated with NMOS was due to the electrons that were the main carriers in comparison to holes, which were slower carriers. Furthermore, the advantage associated with the use of PTL alongside NMOS transistors was the smaller area required, as well as a reduction in complexity due to the use of fewer transistors. However, the disadvantages of employment of PTL with NMOS transistors were the threshold voltage and V drop in multi-bit full adder circuits. In order to resolve this, a sense amplifier was introduced in order to enable output voltage restoration in the multi-bit full adder stages. 2019-02 Thesis http://shdl.mmu.edu.my/7736/ http://library.mmu.edu.my/library2/diglib/mmuetd/ masters Multimedia University Faculty of Engineering & Technology
institution	Multimedia University
collection	MMU Institutional Repository
topic	TK7885-7895 Computer engineering Computer hardware
spellingShingle	TK7885-7895 Computer engineering Computer hardware Subramaniam, Shahmini Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter
description	Digital Finite Impulse Responses (FIR) filter plays a significant role in Digital Signal Processing (DSP). FIR digital filters block certain components of the input frequency. Subsequently, they convey the original signal with the eliminated components to the filter’s output. The advantages of the FIR’s digital filters include linear phase shift, low coefficient sensitivity, and stability. Researchers have thoroughly researched the power dissipation, and efficiency-performance of the FIR digital filters, as they utilize the arithmetic operations, including addition, and multiplication in the DSP system. Adder is a crucially important arithmetic operation which is employed as part of the building block in the FIR filter. In this study, the employment of the power-efficient Pass Transistor Logic (PTL) alongside Negative Channel Metal Oxide Semiconductors (NMOS) was proposed and presented. NMOS transistors were employed for the implementation of digital logic circuits. The higher speed associated with NMOS was due to the electrons that were the main carriers in comparison to holes, which were slower carriers. Furthermore, the advantage associated with the use of PTL alongside NMOS transistors was the smaller area required, as well as a reduction in complexity due to the use of fewer transistors. However, the disadvantages of employment of PTL with NMOS transistors were the threshold voltage and V drop in multi-bit full adder circuits. In order to resolve this, a sense amplifier was introduced in order to enable output voltage restoration in the multi-bit full adder stages.
format	Thesis
qualification_level	Master's degree
author	Subramaniam, Shahmini
author_facet	Subramaniam, Shahmini
author_sort	Subramaniam, Shahmini
title	Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter
title_short	Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter
title_full	Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter
title_fullStr	Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter
title_full_unstemmed	Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter
title_sort	design of power efficient pass transistor logic based full adder circut for digital finite impluse response filter
granting_institution	Multimedia University
granting_department	Faculty of Engineering & Technology
publishDate	2019
_version_	1747829670146998272

Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter

Similar Items