Architecture And Logic Design Of A Discrete Wavelet Transform Processor

Architecture And Logic Design Of A Discrete Wavelet Transform Processor

Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thes...

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Main Author: Lim , Soon Chieh
Format: Thesis
Published: 2005
Subjects:
QA Mathematics
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spelling my-mmu-ep.7862010-07-02T04:24:58Z Architecture And Logic Design Of A Discrete Wavelet Transform Processor 2005-03 Lim , Soon Chieh QA Mathematics Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT. 2005-03 Thesis http://shdl.mmu.edu.my/786/ http://myto.perpun.net.my/metoalogin/logina.php masters Multimedia University Research Library
institution Multimedia University
collection MMU Institutional Repository
topic QA Mathematics
spellingShingle QA Mathematics
Lim , Soon Chieh
Architecture And Logic Design Of A Discrete Wavelet Transform Processor
description Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT.
format Thesis
qualification_level Master's degree
author Lim , Soon Chieh
author_facet Lim , Soon Chieh
author_sort Lim , Soon Chieh
title Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_short Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_full Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_fullStr Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_full_unstemmed Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_sort architecture and logic design of a discrete wavelet transform processor
granting_institution Multimedia University
granting_department Research Library
publishDate 2005
_version_ 1747829216028655616

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