Floating-Point ALU Design

This project presents a floating-point arithmetic unit using pipelining concept. The arithmetic unit constructed supports the four primitive operations of computer arithmetic namely addition, subtraction, multiplication and divison based on IEEE-754 standard.

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Main Author: Huang, Seow Ling
Format: Thesis
Published: 2003
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id my-mmu-ep.969
record_format uketd_dc
spelling my-mmu-ep.9692010-07-15T06:33:53Z Floating-Point ALU Design 2003 Huang, Seow Ling QA Mathematics This project presents a floating-point arithmetic unit using pipelining concept. The arithmetic unit constructed supports the four primitive operations of computer arithmetic namely addition, subtraction, multiplication and divison based on IEEE-754 standard. 2003 Thesis http://shdl.mmu.edu.my/969/ http://myto.perpun.net.my/metoalogin/logina.php masters Multimedia University Research Library
institution Multimedia University
collection MMU Institutional Repository
topic QA Mathematics
spellingShingle QA Mathematics
Huang, Seow Ling
Floating-Point ALU Design
description This project presents a floating-point arithmetic unit using pipelining concept. The arithmetic unit constructed supports the four primitive operations of computer arithmetic namely addition, subtraction, multiplication and divison based on IEEE-754 standard.
format Thesis
qualification_level Master's degree
author Huang, Seow Ling
author_facet Huang, Seow Ling
author_sort Huang, Seow Ling
title Floating-Point ALU Design
title_short Floating-Point ALU Design
title_full Floating-Point ALU Design
title_fullStr Floating-Point ALU Design
title_full_unstemmed Floating-Point ALU Design
title_sort floating-point alu design
granting_institution Multimedia University
granting_department Research Library
publishDate 2003
_version_ 1747829275469283328