Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim

In this work, FinFET (dual-gate) transistor is simulated using computer added design (CAD) tools to replace the conventional planar MOSFET. Nowadays planar transistors are no longer clean due to current leakage during on-off switches. Thus, these effects have caused some heat and power issues. FinFE...

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Main Author:	Abu Salim, Siti Aishah
Format:	Thesis
Language:	English
Published:	2013
Subjects:	Apparatus and materials
Online Access:	https://ir.uitm.edu.my/id/eprint/102692/1/102692.pdf
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id	my-uitm-ir.102692
record_format	uketd_dc
spelling	my-uitm-ir.1026922024-11-18T02:44:29Z Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim 2013 Abu Salim, Siti Aishah Apparatus and materials In this work, FinFET (dual-gate) transistor is simulated using computer added design (CAD) tools to replace the conventional planar MOSFET. Nowadays planar transistors are no longer clean due to current leakage during on-off switches. Thus, these effects have caused some heat and power issues. FinFET transistors offer superior performance as the device is scaled into the nanometer. Therefore, the ON current was investigated by analyzing the I-V characteristic. Also the gate sizing was investigated and the results have shown the differences in their performances. In addition, the SPICE models of 32 nm were employed for inverter, NAND and NOR gates and the results were verified by DC and AC analysis. The results indicate that FinFET circuits have better performance and produced less leakage when compared to planar MOSFET. 2013 Thesis https://ir.uitm.edu.my/id/eprint/102692/ https://ir.uitm.edu.my/id/eprint/102692/1/102692.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering Sulaiman, Suhana
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	Sulaiman, Suhana
topic	Apparatus and materials
spellingShingle	Apparatus and materials Abu Salim, Siti Aishah Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim
description	In this work, FinFET (dual-gate) transistor is simulated using computer added design (CAD) tools to replace the conventional planar MOSFET. Nowadays planar transistors are no longer clean due to current leakage during on-off switches. Thus, these effects have caused some heat and power issues. FinFET transistors offer superior performance as the device is scaled into the nanometer. Therefore, the ON current was investigated by analyzing the I-V characteristic. Also the gate sizing was investigated and the results have shown the differences in their performances. In addition, the SPICE models of 32 nm were employed for inverter, NAND and NOR gates and the results were verified by DC and AC analysis. The results indicate that FinFET circuits have better performance and produced less leakage when compared to planar MOSFET.
format	Thesis
qualification_level	Bachelor degree
author	Abu Salim, Siti Aishah
author_facet	Abu Salim, Siti Aishah
author_sort	Abu Salim, Siti Aishah
title	Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim
title_short	Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim
title_full	Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim
title_fullStr	Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim
title_full_unstemmed	Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim
title_sort	simulation of planar and finfet transistor model for digital gate applications / siti aishah abu salim
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2013
url	https://ir.uitm.edu.my/id/eprint/102692/1/102692.pdf
_version_	1818588046198571008

Simulation of Planar and Finfet Transistor Model for Digital Gate Applications / Siti Aishah Abu Salim

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