Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain

This thesis highlights the effect of Si3N4 capping layer, embedded SiGe in the source/drain and SiGe layer on the bottom of the strained silicon for strained-silicon technology effect on 90 nm complementary metal oxide semiconductor (CMOS) performance focusing on threshold voltage and drain current...

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Main Author:	Mohd Zain, Norlina
Format:	Thesis
Language:	English
Published:	2010
Subjects:	Apparatus and materials
Online Access:	https://ir.uitm.edu.my/id/eprint/102939/1/102939.pdf
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spelling	my-uitm-ir.1029392024-11-19T09:13:50Z Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain 2010 Mohd Zain, Norlina Apparatus and materials This thesis highlights the effect of Si3N4 capping layer, embedded SiGe in the source/drain and SiGe layer on the bottom of the strained silicon for strained-silicon technology effect on 90 nm complementary metal oxide semiconductor (CMOS) performance focusing on threshold voltage and drain current parameters. Strained silicon is used to increase saturated NMOS and PMOS drive currents and enhance electron mobility. Compressive strain is introduced by two techniques strained in the PMOS channel using SiGe such as uniaxial strained and biaxial strained. Tensile strain is introduced in the NMOS channels by using a post silicon-nitride capping layer. ATHENA and ATLAS simulators were used to simulate the fabrication process and to characterize the electrical properties respectively. It can be concluded that NMOS strained technology having high tensile stress improve by 46.9% drain current. PMOS strained technology having compressive stress using biaxial strained PMOS improve 16.4% while uniaxial strained PMOS improve 21.4%. The strained technology were the best on 90 nm for CMOS device is combination of Si)N4 film tensile strain for NMOS and uniaxial compressive strain for PMOS. 2010 Thesis https://ir.uitm.edu.my/id/eprint/102939/ https://ir.uitm.edu.my/id/eprint/102939/1/102939.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
topic	Apparatus and materials
spellingShingle	Apparatus and materials Mohd Zain, Norlina Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain
description	This thesis highlights the effect of Si3N4 capping layer, embedded SiGe in the source/drain and SiGe layer on the bottom of the strained silicon for strained-silicon technology effect on 90 nm complementary metal oxide semiconductor (CMOS) performance focusing on threshold voltage and drain current parameters. Strained silicon is used to increase saturated NMOS and PMOS drive currents and enhance electron mobility. Compressive strain is introduced by two techniques strained in the PMOS channel using SiGe such as uniaxial strained and biaxial strained. Tensile strain is introduced in the NMOS channels by using a post silicon-nitride capping layer. ATHENA and ATLAS simulators were used to simulate the fabrication process and to characterize the electrical properties respectively. It can be concluded that NMOS strained technology having high tensile stress improve by 46.9% drain current. PMOS strained technology having compressive stress using biaxial strained PMOS improve 16.4% while uniaxial strained PMOS improve 21.4%. The strained technology were the best on 90 nm for CMOS device is combination of Si)N4 film tensile strain for NMOS and uniaxial compressive strain for PMOS.
format	Thesis
qualification_level	Bachelor degree
author	Mohd Zain, Norlina
author_facet	Mohd Zain, Norlina
author_sort	Mohd Zain, Norlina
title	Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain
title_short	Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain
title_full	Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain
title_fullStr	Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain
title_full_unstemmed	Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain
title_sort	investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm cmos devices / norlina mohd zain
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2010
url	https://ir.uitm.edu.my/id/eprint/102939/1/102939.pdf
_version_	1818588063984517120

Investigation of silicon nitride capping layer and embedded silicon germanium effect on 90nm CMOS devices / Norlina Mohd Zain

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