Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh

This study presents the analysis of pipeline analog-to-digital converter (ADC) with different sample and hold circuit. Pipeline ADC is a device that performs sampling and digitizing of the analog input. The components inside pipeline ADC are sample and hold circuit, comparator, analog adder, gain 2...

Full description

Saved in:

Bibliographic Details
Main Author:	Mohd Salleh, Asma
Format:	Thesis
Language:	English
Published:	2014
Subjects:	Electric apparatus and materials Electric circuits Electric networks
Online Access:	https://ir.uitm.edu.my/id/eprint/103026/2/103026.pdf
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-uitm-ir.103026
record_format	uketd_dc
spelling	my-uitm-ir.1030262024-10-21T01:46:53Z Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh 2014 Mohd Salleh, Asma Electric apparatus and materials. Electric circuits. Electric networks This study presents the analysis of pipeline analog-to-digital converter (ADC) with different sample and hold circuit. Pipeline ADC is a device that performs sampling and digitizing of the analog input. The components inside pipeline ADC are sample and hold circuit, comparator, analog adder, gain 2 amplifier and switch. Sample and hold circuit is one of the major contributors to the performances of an ADC. Sample and hold circuit is the most power hungry block that plays a crucial role in pipeline ADC. An appropriate and precise sample and hold circuit is needed in order to optimize the power dissipation of pipeline ADC without affecting its performances. This study focused on the analysis and comparison of the 1 bit pipeline ADC performances using two types of S/H circuits; double buffer S/H and double sampling S/H circuit. The performances of pipeline ADC is measure based on its power consumption and conversion speed. The circuits of pipeline ADC was implemented using 0.18um technology with supply voltage of 1.8V in Silvaco Electronic Design Automation (EDA) tools. Double sampling sample and hold circuit is suitable for pipeline ADC since it consume less power and faster than double buffer sample and hold circuit at high sampling rate or high clock frequency. 2014 Thesis https://ir.uitm.edu.my/id/eprint/103026/ https://ir.uitm.edu.my/id/eprint/103026/2/103026.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
topic	Electric apparatus and materials Electric circuits Electric networks
spellingShingle	Electric apparatus and materials Electric circuits Electric networks Mohd Salleh, Asma Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh
description	This study presents the analysis of pipeline analog-to-digital converter (ADC) with different sample and hold circuit. Pipeline ADC is a device that performs sampling and digitizing of the analog input. The components inside pipeline ADC are sample and hold circuit, comparator, analog adder, gain 2 amplifier and switch. Sample and hold circuit is one of the major contributors to the performances of an ADC. Sample and hold circuit is the most power hungry block that plays a crucial role in pipeline ADC. An appropriate and precise sample and hold circuit is needed in order to optimize the power dissipation of pipeline ADC without affecting its performances. This study focused on the analysis and comparison of the 1 bit pipeline ADC performances using two types of S/H circuits; double buffer S/H and double sampling S/H circuit. The performances of pipeline ADC is measure based on its power consumption and conversion speed. The circuits of pipeline ADC was implemented using 0.18um technology with supply voltage of 1.8V in Silvaco Electronic Design Automation (EDA) tools. Double sampling sample and hold circuit is suitable for pipeline ADC since it consume less power and faster than double buffer sample and hold circuit at high sampling rate or high clock frequency.
format	Thesis
qualification_level	Bachelor degree
author	Mohd Salleh, Asma
author_facet	Mohd Salleh, Asma
author_sort	Mohd Salleh, Asma
title	Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh
title_short	Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh
title_full	Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh
title_fullStr	Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh
title_full_unstemmed	Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh
title_sort	analysis of pipeline adc performances with different sample and hold circuits / asma mohd salleh
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2014
url	https://ir.uitm.edu.my/id/eprint/103026/2/103026.pdf
_version_	1818588070262341632

Analysis of pipeline ADC performances with different sample and hold circuits / Asma Mohd Salleh

Similar Items