High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan

This paper describes the design of a 8-bit CMOS folding and interpolating Analog to Digital Converter (ADC) with high speed comparator. The objective of this paper is to design and identify the performance of the ADC with two type of comparator. Another objective of this paper is to minimize the pow...

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Main Author:	Mazlan, Ifzuan
Format:	Thesis
Language:	English
Published:	2012
Subjects:	Apparatus and materials
Online Access:	https://ir.uitm.edu.my/id/eprint/103059/1/103059.pdf
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id	my-uitm-ir.103059
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spelling	my-uitm-ir.1030592024-11-19T03:50:06Z High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan 2012 Mazlan, Ifzuan Apparatus and materials Detectors. Sensors. Sensor networks Computer engineering. Computer hardware This paper describes the design of a 8-bit CMOS folding and interpolating Analog to Digital Converter (ADC) with high speed comparator. The objective of this paper is to design and identify the performance of the ADC with two type of comparator. Another objective of this paper is to minimize the power consumption of the ADC circuit especially from a comparator. Flash ADC is one of the faster ways to convert any analog signal to a digital signal and use folding and interpolating technique allows each comparator of the ADC to be reused several times over the full scale input range. In addition, interpolating technique can reduce the number of folding circuit required in a folding ADC hence further improve the performance of the ADC in term of capacitive loading and power consumption. Besides that, 60 percent speed of the ADC also depends on the comparator. If we use very fast and stable comparator, the ADC will be more fast and effectively to do the next applications. The simulation results indicate that the Comparator Design 1 achieves low power operation rather than Comparator Design 2 with a minimum number of transistors used, 2GHz of input signal and 497.02mW of power consumption from a single 2V voltage supply based to Gateway SDA tools simulation result. 2012 Thesis https://ir.uitm.edu.my/id/eprint/103059/ https://ir.uitm.edu.my/id/eprint/103059/1/103059.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering -, Siti Lailatul
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	-, Siti Lailatul
topic	Apparatus and materials Apparatus and materials Apparatus and materials
spellingShingle	Apparatus and materials Apparatus and materials Apparatus and materials Mazlan, Ifzuan High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
description	This paper describes the design of a 8-bit CMOS folding and interpolating Analog to Digital Converter (ADC) with high speed comparator. The objective of this paper is to design and identify the performance of the ADC with two type of comparator. Another objective of this paper is to minimize the power consumption of the ADC circuit especially from a comparator. Flash ADC is one of the faster ways to convert any analog signal to a digital signal and use folding and interpolating technique allows each comparator of the ADC to be reused several times over the full scale input range. In addition, interpolating technique can reduce the number of folding circuit required in a folding ADC hence further improve the performance of the ADC in term of capacitive loading and power consumption. Besides that, 60 percent speed of the ADC also depends on the comparator. If we use very fast and stable comparator, the ADC will be more fast and effectively to do the next applications. The simulation results indicate that the Comparator Design 1 achieves low power operation rather than Comparator Design 2 with a minimum number of transistors used, 2GHz of input signal and 497.02mW of power consumption from a single 2V voltage supply based to Gateway SDA tools simulation result.
format	Thesis
qualification_level	Bachelor degree
author	Mazlan, Ifzuan
author_facet	Mazlan, Ifzuan
author_sort	Mazlan, Ifzuan
title	High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
title_short	High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
title_full	High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
title_fullStr	High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
title_full_unstemmed	High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan
title_sort	high speed with low power folding and interpolating adc comparing performance using two types of comparator in cmos 0.18um technology / ifzuan mazlan
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2012
url	https://ir.uitm.edu.my/id/eprint/103059/1/103059.pdf
_version_	1818588075839717376

High speed with low power folding and interpolating adc comparing performance using two types of comparator in CMOS 0.18um technology / Ifzuan Mazlan

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