Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman

Nowadays, downsizing the size of metal-oxide semiconductor field effect transistor (mosfet) is the recent trends in MOSFET technologies such as the aggressive scaling of gate length, the decrease in on-current with scaling, and the increased demand for a variety of transistor types for use in a wide...

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Main Author: Othman, Nur Hidayah
Format: Thesis
Language:English
Published: 2007
Subjects:
Online Access:https://ir.uitm.edu.my/id/eprint/103063/1/103063.pdf
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spelling my-uitm-ir.1030632024-11-19T03:55:23Z Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman 2007 Othman, Nur Hidayah Semiconductors Computer engineering. Computer hardware Nowadays, downsizing the size of metal-oxide semiconductor field effect transistor (mosfet) is the recent trends in MOSFET technologies such as the aggressive scaling of gate length, the decrease in on-current with scaling, and the increased demand for a variety of transistor types for use in a wide range of target products. This research is focused on the development of 0.13um channel length of pchannel (pmos) enhancement mode MOSFET. Simulation of the process is carried out using silvaco athena to modify theoretical values and obtain accurate process parameters. The most common effect that occurs in the short channel MOSFETS are channel modulation, drain induced barrier lowering (dibl), punch-through and hot electron effect. Several advanced method such as lightly-doped drain (ldd), halo implant and retrograde well is applied to reduce the short channel effects. At the device simulation process, the electrical parameter is extracted to investigate the device characteristics. Several design analysis are performed to investigate the effectiveness of the advanced method in order to prevent the varying of threshold voltage or short channel effect of a mosfet device. 2007 Thesis https://ir.uitm.edu.my/id/eprint/103063/ https://ir.uitm.edu.my/id/eprint/103063/1/103063.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering Hussin, Hanim
institution Universiti Teknologi MARA
collection UiTM Institutional Repository
language English
advisor Hussin, Hanim
topic Semiconductors
Semiconductors
spellingShingle Semiconductors
Semiconductors
Othman, Nur Hidayah
Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman
description Nowadays, downsizing the size of metal-oxide semiconductor field effect transistor (mosfet) is the recent trends in MOSFET technologies such as the aggressive scaling of gate length, the decrease in on-current with scaling, and the increased demand for a variety of transistor types for use in a wide range of target products. This research is focused on the development of 0.13um channel length of pchannel (pmos) enhancement mode MOSFET. Simulation of the process is carried out using silvaco athena to modify theoretical values and obtain accurate process parameters. The most common effect that occurs in the short channel MOSFETS are channel modulation, drain induced barrier lowering (dibl), punch-through and hot electron effect. Several advanced method such as lightly-doped drain (ldd), halo implant and retrograde well is applied to reduce the short channel effects. At the device simulation process, the electrical parameter is extracted to investigate the device characteristics. Several design analysis are performed to investigate the effectiveness of the advanced method in order to prevent the varying of threshold voltage or short channel effect of a mosfet device.
format Thesis
qualification_level Bachelor degree
author Othman, Nur Hidayah
author_facet Othman, Nur Hidayah
author_sort Othman, Nur Hidayah
title Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman
title_short Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman
title_full Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman
title_fullStr Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman
title_full_unstemmed Fabrication and characterization of 130nm PMOS device using Silvaco simulator / Nur Hidayah Othman
title_sort fabrication and characterization of 130nm pmos device using silvaco simulator / nur hidayah othman
granting_institution Universiti Teknologi MARA (UiTM)
granting_department Faculty of Electrical Engineering
publishDate 2007
url https://ir.uitm.edu.my/id/eprint/103063/1/103063.pdf
_version_ 1818588076092424192