Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin

This paper focused on Convolutional Codes as one of the error detection and correction technique that use special generator polynomial. The first generator polynomial is X3 +X*+ X1 + 1 (1111) and the second generator polynomial is X3 + X2 + 1 (1011). The simulation is performing using Circuit Maker...

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Main Author:	Sayed Hussin, Sayed Aziz
Format:	Thesis
Language:	English
Published:	2003
Subjects:	Telecommunication
Online Access:	https://ir.uitm.edu.my/id/eprint/68030/1/68030.pdf
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id	my-uitm-ir.68030
record_format	uketd_dc
spelling	my-uitm-ir.680302023-05-24T04:40:30Z Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin 2003 Sayed Hussin, Sayed Aziz Telecommunication This paper focused on Convolutional Codes as one of the error detection and correction technique that use special generator polynomial. The first generator polynomial is X3 +X*+ X1 + 1 (1111) and the second generator polynomial is X3 + X2 + 1 (1011). The simulation is performing using Circuit Maker for the Clock Pulse Generator to make sure the pulse is available of the D-type Flip Flop to operate. This process also is done to make sure that the pulse that we got is the suitable pulse, which is not to fast and also not too slow. The simulation process for the encoder and decoder of this hardware is perform using XILINX Designer version 2.1 toolbox to determine the process and technique of creating a digital circuit and demonstrates how the design work in encoder and decoder. This project is base on Convolution Codes including the theory, simulation technique and the hardware development of Convolutional Codes. 2003 Thesis https://ir.uitm.edu.my/id/eprint/68030/ https://ir.uitm.edu.my/id/eprint/68030/1/68030.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering Ibrahim, Muhammad
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	Ibrahim, Muhammad
topic	Telecommunication
spellingShingle	Telecommunication Sayed Hussin, Sayed Aziz Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
description	This paper focused on Convolutional Codes as one of the error detection and correction technique that use special generator polynomial. The first generator polynomial is X3 +X*+ X1 + 1 (1111) and the second generator polynomial is X3 + X2 + 1 (1011). The simulation is performing using Circuit Maker for the Clock Pulse Generator to make sure the pulse is available of the D-type Flip Flop to operate. This process also is done to make sure that the pulse that we got is the suitable pulse, which is not to fast and also not too slow. The simulation process for the encoder and decoder of this hardware is perform using XILINX Designer version 2.1 toolbox to determine the process and technique of creating a digital circuit and demonstrates how the design work in encoder and decoder. This project is base on Convolution Codes including the theory, simulation technique and the hardware development of Convolutional Codes.
format	Thesis
qualification_level	Bachelor degree
author	Sayed Hussin, Sayed Aziz
author_facet	Sayed Hussin, Sayed Aziz
author_sort	Sayed Hussin, Sayed Aziz
title	Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
title_short	Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
title_full	Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
title_fullStr	Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
title_full_unstemmed	Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
title_sort	hardware design of convolutional encoder and decoder for digital communication system / sayed aziz sayed hussin
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2003
url	https://ir.uitm.edu.my/id/eprint/68030/1/68030.pdf
_version_	1783735747998646272

Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin

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