RF harvester for DC supply
This project focuses on the design of 2GHz rectenna for harvesting RF signal. This 2GHz signal is from a 3G signal and ISM band that is easy to be found in town areas. The rectenna comprises an array of rectangular patch of microstrip antenna, power combiner and voltage multiplier. Patch antenna wa...
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| 主要作者: | |
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| 格式: | Thesis |
| 語言: | English |
| 主題: | |
| 在線閱讀: | http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/59421/1/Page%201-24.pdf http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/59421/2/Full%20text.pdf |
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| 總結: | This project focuses on the design of 2GHz rectenna for harvesting RF signal. This
2GHz signal is from a 3G signal and ISM band that is easy to be found in town areas. The rectenna comprises an array of rectangular patch of microstrip antenna, power combiner and voltage multiplier. Patch antenna was designed using a CST
Microwave Studio 2012. The following parameters: return loss, bandwidth,
radiation pattern, voltage standing wave ratio (VSWR), input impedance and
antenna polarization were obtained from simulation. The power combiner circuit
was designed using a Wilkinson power splitter. A power combiner for six stages
and 64 inputs was proposed, designed and evaluated. The performance was done
by simulation using ADS 2009 software. Two multipliers, three and six stages
voltage multiplier were designed and evaluated using the same software. After
designing and simulating, the following results were obtained. The designed
antenna was simulated and it obtained 44.4dB of return loss with 400MHz of
bandwidth, 1.01:1 of VSWR, 50Ω input impedance and 6.202dBi of directivity for
the radiation pattern. A full analytical study of power combiner was done and
simulation results are presented. The design of the power combiner obtained a 9dB
output gain for three stages power combiner. A six-stage voltage multiplier has
been simulated and it had a 3.901V of output voltage for the input voltage of 1V.
The power produced by the harvester is 20mA. However, there were some
harmonics shown by the ripples on the graph. The ripples can be reduced by
adding the capacitor of a higher value. In conclusion, the proposed designs have
been successfully designed and the simulated results have been obtained within the
specifications. |
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