Numerical simulations of innovative ground plane and double-gate configurations in thin-body and -buried oxide of SOI MOSFETS
The downscaling of transistors enables an increased in transistor density, faster switching speeds and greater complexity with no increase in power consumption. However, the scaling of the conventional planar MOS transistors appears to be reaching the end of the technology roadmap due to worsening...
Saved in:
格式: | Thesis |
---|---|
语言: | English |
主题: | |
在线阅读: | http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77998/1/Page%201-24.pdf http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77998/2/Full%20text.pdf http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77998/4/Noraini%20Othman.pdf |
标签: |
添加标签
没有标签, 成为第一个标记此记录!
|
相似书籍
-
Electrical characterization of bulk traps and interface traps in the fully-depleted SOI MOSFET /
由: Lun, Zhao
出版: (2002) -
A study on the effects of design parameters on PD SOI MOSFET /
由: Nurul Azimah Ahmad Arzaai
出版: (2013) -
Carrier lifetime characterization techniques in SOI and bulk silicon /
由: Cheng, Zhiyuan
出版: (1999) -
A study on the impact of processing parameters on silicon-on-insulator power MOSFET /
由: Noraziah Abd Wahab
出版: (2013) -
Hot-carrier studies in submicrometer SOI and conventional MOSFETs /
由: Yip, Anselm
出版: (1998)