A Cost And Power Efficient Ddr4/Gddr5x/Gddr5 Transmitter With 3-Tap Equalizer
The demand on memory bandwidth has been increasing due to the rapid development in graphics intensive applications and big data analytics. Limited of the I/O and thermal densities, widening of data bus is no longer a feasible option for increasing memory bandwidth. Therefore, high-speed DDR transmit...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2016
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| Subjects: | |
| Online Access: | http://eprints.usm.my/41304/1/NG_HOONG_CHIN_24_Pages.pdf |
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