Thermal And Flicker Noise Analysis In Sample And Hold Circuit
In low-frequency applications, noise is becoming more of an issue as the MOS size reduced. Therefore, the flicker noise and thermal noise are one of the issues found in low-frequency applications. In this work, the thermal noise and flicker noise are modelled and measured on the sample-and-hold c...
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2015
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my-usm-ep.468712021-11-17T03:42:19Z Thermal And Flicker Noise Analysis In Sample And Hold Circuit 2015-08-01 Maniam, Balamurali T Technology (General) TK1-9971 Electrical engineering. Electronics. Nuclear engineering In low-frequency applications, noise is becoming more of an issue as the MOS size reduced. Therefore, the flicker noise and thermal noise are one of the issues found in low-frequency applications. In this work, the thermal noise and flicker noise are modelled and measured on the sample-and-hold circuit, based on Fully Differential Folded Cascode with Common Mode Feedback. The thermal noise analysis and flicker noise analysis are performed by varying the capacitance value and transistor sizes in the sample-and-hold circuit. In thermal noise analysis, the maximum output SNR measured is -120.28dB with 0.642uV/√Hz input thermal noise and transistor size for NMOS is set to 8μm. The maximum output SNR obtained for flicker noise is -83.27dB for 1uA input noise with low capacitance value 0.5pF and is measured at 1Hz frequency in sample-and-hold circuit. 2015-08 Thesis http://eprints.usm.my/46871/ http://eprints.usm.my/46871/1/Thermal%20And%20Flicker%20Noise%20Analysis%20In%20Sample%20And%20Hold%20Circuit.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Elektrik & Elektronik |
| institution |
Universiti Sains Malaysia |
| collection |
USM Institutional Repository |
| language |
English |
| topic |
T Technology (General) T Technology (General) |
| spellingShingle |
T Technology (General) T Technology (General) Maniam, Balamurali Thermal And Flicker Noise Analysis In Sample And Hold Circuit |
| description |
In low-frequency applications, noise is becoming more of an issue as the MOS
size reduced. Therefore, the flicker noise and thermal noise are one of the issues found
in low-frequency applications. In this work, the thermal noise and flicker noise are
modelled and measured on the sample-and-hold circuit, based on Fully Differential
Folded Cascode with Common Mode Feedback. The thermal noise analysis and flicker
noise analysis are performed by varying the capacitance value and transistor sizes in
the sample-and-hold circuit. In thermal noise analysis, the maximum output SNR
measured is -120.28dB with 0.642uV/√Hz input thermal noise and transistor size for
NMOS is set to 8μm. The maximum output SNR obtained for flicker noise is -83.27dB
for 1uA input noise with low capacitance value 0.5pF and is measured at 1Hz
frequency in sample-and-hold circuit. |
| format |
Thesis |
| qualification_level |
Master's degree |
| author |
Maniam, Balamurali |
| author_facet |
Maniam, Balamurali |
| author_sort |
Maniam, Balamurali |
| title |
Thermal And Flicker Noise Analysis In Sample And Hold Circuit |
| title_short |
Thermal And Flicker Noise Analysis In Sample And Hold Circuit |
| title_full |
Thermal And Flicker Noise Analysis In Sample And Hold Circuit |
| title_fullStr |
Thermal And Flicker Noise Analysis In Sample And Hold Circuit |
| title_full_unstemmed |
Thermal And Flicker Noise Analysis In Sample And Hold Circuit |
| title_sort |
thermal and flicker noise analysis in sample and hold circuit |
| granting_institution |
Universiti Sains Malaysia |
| granting_department |
Pusat Pengajian Kejuruteraan Elektrik & Elektronik |
| publishDate |
2015 |
| url |
http://eprints.usm.my/46871/1/Thermal%20And%20Flicker%20Noise%20Analysis%20In%20Sample%20And%20Hold%20Circuit.pdf |
| _version_ |
1747821739533926400 |