Mold filling parameters in resin transfer molding for flip chip semiconductor packages
Flip chip technology is always been the preferred option for semiconductor packaging technology due to its advantages in both material and manufacturing cost compare co wire bonding interconnect technology. Inversely, flip chip technology with chip flipped and attached to substrate provides a gap in...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English English |
| Published: |
2017
|
| Subjects: | |
| Online Access: | http://eprints.utem.edu.my/id/eprint/22475/1/Mold%20Filling%20Parameters%20In%20Resin%20Transfer%20Molding%20For%20Flip%20Chip%20Semiconductor%20Packages.pdf http://eprints.utem.edu.my/id/eprint/22475/2/Mold%20filling%20parameters%20in%20resin%20transfer%20molding%20for%20flip%20chip%20semiconductor%20packages.pdf |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | Flip chip technology is always been the preferred option for semiconductor packaging technology due to its advantages in both material and manufacturing cost compare co wire bonding interconnect technology. Inversely, flip chip technology with chip flipped and attached to substrate provides a gap in between chip and substrate which cause resistances for molding compound to fill in. The incomplete filling allows air and moisture to be trapped into the gap and subsequently cause product functional failure when it is subject to reliability stress. Alternative approach which can be applied to counter this challenge is the application of capillary underfill (CUF). However this approach applied higher manufacturing cost due to additional material and process needed. A conventional transfer molding process which offer less cost and processes is possible to counter this challenge. A detail understanding of the molding parameters is required to influence and improve the incomplete filling. An experiment designed using Design of Experiment (DOE) was carried out to evaluate the impact of the key parameters towards incomplete mold size. Key parameters which is temperature, transfer pressure and transfer time were selected as input factors of the DOE. Different chip si2es were covered in the DOE. Output response of the DOE was the incomplete mold size. A significance of each key parameter to the output response was studied. Transfer pressure appeared to be the most significant factor followed by the interaction between temperature and transfer pressure. A prediction model which consists of the significant input parameters was established and validated. The model was found to be fit to predict incomplete mold size within the input parameters range. |
|---|