Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using

Transfer moulding is a process that generally used at an assembly area in the electronics industry, specifically in the semiconductor plastic packaging industry. This is because the transfer moulding uses an Epoxy Moulding Compound (EMC) material to encapsulate the chip and wire bond that attached t...

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Main Author:	Zainul Hashimi, Faridah
Format:	Thesis
Language:	English English
Published:	2019
Subjects:	T Technology (General) TP Chemical technology
Online Access:	http://eprints.utem.edu.my/id/eprint/24952/1/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf http://eprints.utem.edu.my/id/eprint/24952/2/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf
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id	my-utem-ep.24952
record_format	uketd_dc
institution	Universiti Teknikal Malaysia Melaka
collection	UTeM Repository
language	English English
advisor	Md Ali, Mohd Amran
topic	T Technology (General) TP Chemical technology
spellingShingle	T Technology (General) TP Chemical technology Zainul Hashimi, Faridah Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
description	Transfer moulding is a process that generally used at an assembly area in the electronics industry, specifically in the semiconductor plastic packaging industry. This is because the transfer moulding uses an Epoxy Moulding Compound (EMC) material to encapsulate the chip and wire bond that attached to the lead frame. The moulding process is important because its function is to protect the chip inside the package and ensure the product performs well. The most common failure occurred during transfer moulding is voids. Voids can cause oxidation on the mould compound resulting from trapped air. Defects can degrade the performance of a product. This defect can be reduced or eliminated and extends the lifespan of the product by improving the transfer moulding parameters. There are four parameters in this project, namely clamp force, cure time, transfer pressure, and transfer speed. EMC from Panasonic was used in this study. The Design of Experiment (DOE) using the Taguchi design method was applied with four factors of input parameters that have three levels to select the optimum transfer moulding process. The responses measured from this experiment is the total area of voids. The total area of voids was measured using CATIA software. Prior to that, the package was X-rayed, and the X-ray image was then transferred to a computer to determine the area of voids. Analysis of results with optimization was conducted to obtain the best combination of process parameters to the transfer moulding response. Analysis of Variance (ANOVA) for the area of voids indicated transfer speed is the most significant parameter with 88.34%. As the transfer speed increased, the total area of voids decreased. Thus, it indicates that transfer speed is the most influential parameter on the transfer moulding process in the semiconductor plastic package. The optimization of the optimum level of parameters which the transfer speed is 3.5 mm/s (Level 3), transfer pressure is 11 MPa (Level 3), clamp force is 250 kN (Level 1) and cure time is 80 s (Level 3) had improved the voids to 80% from 0.009 mm2 to 0.0018 mm2. It shows that by using DOE by Taguchi method, the defect of voids in transfer moulding can be reduced.
format	Thesis
qualification_name	Master of Philosophy (M.Phil.)
qualification_level	Master's degree
author	Zainul Hashimi, Faridah
author_facet	Zainul Hashimi, Faridah
author_sort	Zainul Hashimi, Faridah
title	Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_short	Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_full	Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_fullStr	Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_full_unstemmed	Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_sort	reducing void during transfer moulding of semiconductor plastic package using
granting_institution	Universiti Teknikal Malaysia Melaka
granting_department	Faculty of Manufacturing Engineering
publishDate	2019
url	http://eprints.utem.edu.my/id/eprint/24952/1/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf http://eprints.utem.edu.my/id/eprint/24952/2/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf
_version_	1747834104808734720
spelling	my-utem-ep.249522021-09-29T12:14:21Z Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using 2019 Zainul Hashimi, Faridah T Technology (General) TP Chemical technology Transfer moulding is a process that generally used at an assembly area in the electronics industry, specifically in the semiconductor plastic packaging industry. This is because the transfer moulding uses an Epoxy Moulding Compound (EMC) material to encapsulate the chip and wire bond that attached to the lead frame. The moulding process is important because its function is to protect the chip inside the package and ensure the product performs well. The most common failure occurred during transfer moulding is voids. Voids can cause oxidation on the mould compound resulting from trapped air. Defects can degrade the performance of a product. This defect can be reduced or eliminated and extends the lifespan of the product by improving the transfer moulding parameters. There are four parameters in this project, namely clamp force, cure time, transfer pressure, and transfer speed. EMC from Panasonic was used in this study. The Design of Experiment (DOE) using the Taguchi design method was applied with four factors of input parameters that have three levels to select the optimum transfer moulding process. The responses measured from this experiment is the total area of voids. The total area of voids was measured using CATIA software. Prior to that, the package was X-rayed, and the X-ray image was then transferred to a computer to determine the area of voids. Analysis of results with optimization was conducted to obtain the best combination of process parameters to the transfer moulding response. Analysis of Variance (ANOVA) for the area of voids indicated transfer speed is the most significant parameter with 88.34%. As the transfer speed increased, the total area of voids decreased. Thus, it indicates that transfer speed is the most influential parameter on the transfer moulding process in the semiconductor plastic package. The optimization of the optimum level of parameters which the transfer speed is 3.5 mm/s (Level 3), transfer pressure is 11 MPa (Level 3), clamp force is 250 kN (Level 1) and cure time is 80 s (Level 3) had improved the voids to 80% from 0.009 mm2 to 0.0018 mm2. It shows that by using DOE by Taguchi method, the defect of voids in transfer moulding can be reduced. 2019 Thesis http://eprints.utem.edu.my/id/eprint/24952/ http://eprints.utem.edu.my/id/eprint/24952/1/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf text en 2024-08 staffonly http://eprints.utem.edu.my/id/eprint/24952/2/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf text en validuser https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=117932 mphil masters Universiti Teknikal Malaysia Melaka Faculty of Manufacturing Engineering Md Ali, Mohd Amran 1. Adams, T, 2013. Voids in Electronic Parts: Yield to Ultrasound [online]. Available at: https://www.asminternational.org/documents/10192/6016442/amp17106p22.pdf/8c111530-1471-4add-b4ec-94f8ff192455/AMP17106P22 [Accessed on 9 June 2019] 2. Ali, M. M., Khamis, A. K., Hussein, N. I. S., Abdullah, R. R., Kasim, M. S., Bakar, M. A., Mohamad, E. and Sulaiman, M. A., 2015. Performance on Tensile Properties of GFRP Stacking Sequence using Taguchi Method. Proceedings of Mechanical Engineering Research Day 2015 (MERD'15), pp.71-72. 3. Jalas, D., Petrov, A. and Eich, M., 2013. What is and what is not an Optical Isolator. Nature Photonics, 7, pp. 579-582. 4. Liu, S. L., Chen, G. and Yong, M. S., 2004. EMC Characterization and Process Study for Electronics Packaging. Thin Solid Films, 462-463, pp. 454-458. 5. Liu, X. and Chen, F., 2016. A Review of Void Formation and its Effects on the Mechanical Performance of Carbon Fiber Reinforced Plastic. Engineering Transactions, 64 (1), pp. 33-51. 6. Panasonic, 2016. Basic study of EMC. Electronic Materials Panasonic Corporation, Thailand. 7. Singh, B., Singh, P., Tejpal, G. and Singh, G., 2012. An Experimental Study of Surface Roughness of H11 Steel in EDM Process Using Copper Tool Electrode. International Journal of Advanced Engineering Technology, pp. 130-133. 8. Tong, K. W., Kwong, C. K. and Ip, K. W., 2003. Optimization of Process Conditions for the Transfer Molding of Electronic Packages. Journal of Materials Processing Technology, 138, pp. 361-365. 9. Towa, 2019. Plastic Molding Technologies/Transfer Molding and Compression Molding [online]. Available at: https://www.towajapan.co.jp/en/technology/molding/ [Accessed on 9 June 2019]. 10. Wu, H., He, S., Chen, X., Xu, G. and Lei, D., 2016. Failure Mechanisms and Package Reliability Issues in Optocouplers. 17th International Conference on Electronic Packaging Technology (ICEPT), pp. 1240-1243. IEEE,

Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using

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