Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
Carrierless Amplitude Phase (CAP) Modulation is a multidimensional and multilevel of modulation scheme which it is strongly inspired by QAM modulation scheme. CAP does not depend on a carrier and it is much simpler. Lots of CAP modulation experiments have been proposed and demonstrate but none of th...
محفوظ في:
| المؤلف الرئيسي: | |
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| التنسيق: | أطروحة |
| اللغة: | English English English |
| منشور في: |
2015
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| الموضوعات: | |
| الوصول للمادة أونلاين: | http://eprints.uthm.edu.my/1504/3/YUSMAHAIDA%20YUSOFF%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/1504/1/24p%20YUSMAHAIDA%20YUSOF.pdf http://eprints.uthm.edu.my/1504/2/YUSMAHAIDA%20YUSOFF%20WATERMARK.pdf |
| الوسوم: |
إضافة وسم
لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!
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| الملخص: | Carrierless Amplitude Phase (CAP) Modulation is a multidimensional and multilevel of modulation scheme which it is strongly inspired by QAM modulation scheme. CAP does not depend on a carrier and it is much simpler. Lots of CAP modulation experiments have been proposed and demonstrate but none of them were introduced in real time system. Therefore Very High Speed IC Hardware Description Language (VHDL) has been chosen as a method to investigate the modulation of CAP transmitter in real time. This project focused on 2D CAP transmitter implementation in VHDL. The aim of this project is to investigate the CAP transmitter modulation by using Fast Fourier Transform (FFT) and implement the core signal processing blocks using VHDL. Therefore 4 selected blocks of CAP transmitter: random generator, constellation mapper, modulation and Inverse Fast Fourier Transform (IFFT) were designed and analyzed. Then they were compared to the theory of CAP modulation and Quadrature Amplitude Modulation (QAM).The transition table was created based on modulation theory for proofing purposed. Quartus II has been used for simulation in implementing 4 RAMs, 1 radix butterfly and designing an IFFT. 3 stages were connected with each other using CORDIC algorithm and 23 multiplexers. We believe that this project is a good start for implementing 2D-CAP in the real time. Real time is good because it is timeliness, fast, low loss rate, low end to end delay and very cost effectively. |
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