Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)

Carrierless Amplitude Phase (CAP) Modulation is a multidimensional and multilevel of modulation scheme which it is strongly inspired by QAM modulation scheme. CAP does not depend on a carrier and it is much simpler. Lots of CAP modulation experiments have been proposed and demonstrate but none of th...

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Main Author:	Yusoff, Yusmahaida
Format:	Thesis
Language:	English English English
Published:	2015
Subjects:	TK7885-7895 Computer engineering Computer hardware
Online Access:	http://eprints.uthm.edu.my/1504/3/YUSMAHAIDA%20YUSOFF%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/1504/1/24p%20YUSMAHAIDA%20YUSOF.pdf http://eprints.uthm.edu.my/1504/2/YUSMAHAIDA%20YUSOFF%20WATERMARK.pdf
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id	my-uthm-ep.1504
record_format	uketd_dc
spelling	my-uthm-ep.15042021-10-03T07:46:14Z Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL) 2015-08 Yusoff, Yusmahaida TK7885-7895 Computer engineering. Computer hardware Carrierless Amplitude Phase (CAP) Modulation is a multidimensional and multilevel of modulation scheme which it is strongly inspired by QAM modulation scheme. CAP does not depend on a carrier and it is much simpler. Lots of CAP modulation experiments have been proposed and demonstrate but none of them were introduced in real time system. Therefore Very High Speed IC Hardware Description Language (VHDL) has been chosen as a method to investigate the modulation of CAP transmitter in real time. This project focused on 2D CAP transmitter implementation in VHDL. The aim of this project is to investigate the CAP transmitter modulation by using Fast Fourier Transform (FFT) and implement the core signal processing blocks using VHDL. Therefore 4 selected blocks of CAP transmitter: random generator, constellation mapper, modulation and Inverse Fast Fourier Transform (IFFT) were designed and analyzed. Then they were compared to the theory of CAP modulation and Quadrature Amplitude Modulation (QAM).The transition table was created based on modulation theory for proofing purposed. Quartus II has been used for simulation in implementing 4 RAMs, 1 radix butterfly and designing an IFFT. 3 stages were connected with each other using CORDIC algorithm and 23 multiplexers. We believe that this project is a good start for implementing 2D-CAP in the real time. Real time is good because it is timeliness, fast, low loss rate, low end to end delay and very cost effectively. 2015-08 Thesis http://eprints.uthm.edu.my/1504/ http://eprints.uthm.edu.my/1504/3/YUSMAHAIDA%20YUSOFF%20COPYRIGHT%20DECLARATION.pdf text en staffonly http://eprints.uthm.edu.my/1504/1/24p%20YUSMAHAIDA%20YUSOF.pdf text en public http://eprints.uthm.edu.my/1504/2/YUSMAHAIDA%20YUSOFF%20WATERMARK.pdf text en validuser mphil masters Universiti Tun Hussein Onn Malaysia Faculty of Electrical and Electronic Engineering
institution	Universiti Tun Hussein Onn Malaysia
collection	UTHM Institutional Repository
language	English English English
topic	TK7885-7895 Computer engineering Computer hardware
spellingShingle	TK7885-7895 Computer engineering Computer hardware Yusoff, Yusmahaida Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
description	Carrierless Amplitude Phase (CAP) Modulation is a multidimensional and multilevel of modulation scheme which it is strongly inspired by QAM modulation scheme. CAP does not depend on a carrier and it is much simpler. Lots of CAP modulation experiments have been proposed and demonstrate but none of them were introduced in real time system. Therefore Very High Speed IC Hardware Description Language (VHDL) has been chosen as a method to investigate the modulation of CAP transmitter in real time. This project focused on 2D CAP transmitter implementation in VHDL. The aim of this project is to investigate the CAP transmitter modulation by using Fast Fourier Transform (FFT) and implement the core signal processing blocks using VHDL. Therefore 4 selected blocks of CAP transmitter: random generator, constellation mapper, modulation and Inverse Fast Fourier Transform (IFFT) were designed and analyzed. Then they were compared to the theory of CAP modulation and Quadrature Amplitude Modulation (QAM).The transition table was created based on modulation theory for proofing purposed. Quartus II has been used for simulation in implementing 4 RAMs, 1 radix butterfly and designing an IFFT. 3 stages were connected with each other using CORDIC algorithm and 23 multiplexers. We believe that this project is a good start for implementing 2D-CAP in the real time. Real time is good because it is timeliness, fast, low loss rate, low end to end delay and very cost effectively.
format	Thesis
qualification_name	Master of Philosophy (M.Phil.)
qualification_level	Master's degree
author	Yusoff, Yusmahaida
author_facet	Yusoff, Yusmahaida
author_sort	Yusoff, Yusmahaida
title	Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
title_short	Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
title_full	Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
title_fullStr	Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
title_full_unstemmed	Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
title_sort	experimental demonstration of cap transmitter using very high speed ic hardware description language (vhdl)
granting_institution	Universiti Tun Hussein Onn Malaysia
granting_department	Faculty of Electrical and Electronic Engineering
publishDate	2015
url	http://eprints.uthm.edu.my/1504/3/YUSMAHAIDA%20YUSOFF%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/1504/1/24p%20YUSMAHAIDA%20YUSOF.pdf http://eprints.uthm.edu.my/1504/2/YUSMAHAIDA%20YUSOFF%20WATERMARK.pdf
_version_	1747830804967325696

Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)

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