Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology

This research presents failure analysis (FA) works on gate oxide defect of Bi�polar CMOS Diffuse (BCD) technology. The latent problem with electrical degradation in the CMOS performance is due to gate oxide defect. The defect was well known affects the CMOS reliability after certain period of ti...

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Main Author: Abdullah, Farisal
Format: Thesis
Language:English
English
English
Published: 2013
Subjects:
Online Access:http://eprints.uthm.edu.my/1902/1/24p%20FARISAL%20ABDULLAH.pdf
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spelling my-uthm-ep.19022021-10-12T04:32:30Z Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology 2013-03 Abdullah, Farisal TK Electrical engineering. Electronics Nuclear engineering TK7800-8360 Electronics This research presents failure analysis (FA) works on gate oxide defect of Bi�polar CMOS Diffuse (BCD) technology. The latent problem with electrical degradation in the CMOS performance is due to gate oxide defect. The defect was well known affects the CMOS reliability after certain period of time, temperatures and stress. The FA techniques used for this research were developed using a combination of IDDQ scan test pattern, photo localization by the emission microscope and Field Emission Scanning Electron Microscopy (FE-SEM) for defect inspection. The FA methods successfully evaluated on few failing samples which were taken from customer return with IDDQ failure range from 50µA until less than 1mA. Concurrently, the spotted excessive emission found on the defective samples during photo localization step indicates of gate oxide defect. The defect well observed with FE-SEM analysis on all tested samples after the physical analysis accomplishment until oxide layer. The proposed technique shows an effective method to compensate the existing FA difficulty on gate oxide defect faced by IC manufacturer in micrometer and nanometer scale technology, which having more metal interconnection layers with higher dense. The proposed technique able to construct promising result compared to the conventional techniques which used in the current FA practice due to certain extends of limitation. 2013-03 Thesis http://eprints.uthm.edu.my/1902/ http://eprints.uthm.edu.my/1902/1/24p%20FARISAL%20ABDULLAH.pdf text en public http://eprints.uthm.edu.my/1902/2/FARISAL%20ABDULLAH%20COPYRIGHT%20DECLARATION.pdf text en staffonly http://eprints.uthm.edu.my/1902/3/FARISAL%20ABDULLAH%20WATERMARK.pdf text en validuser mphil masters Universiti Tun Hussein Onn Malaysia Fakulti Kejuruteraan Elektrik dan Elektronik
institution Universiti Tun Hussein Onn Malaysia
collection UTHM Institutional Repository
language English
English
English
topic TK Electrical engineering
Electronics Nuclear engineering
TK7800-8360 Electronics
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
TK7800-8360 Electronics
Abdullah, Farisal
Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
description This research presents failure analysis (FA) works on gate oxide defect of Bi�polar CMOS Diffuse (BCD) technology. The latent problem with electrical degradation in the CMOS performance is due to gate oxide defect. The defect was well known affects the CMOS reliability after certain period of time, temperatures and stress. The FA techniques used for this research were developed using a combination of IDDQ scan test pattern, photo localization by the emission microscope and Field Emission Scanning Electron Microscopy (FE-SEM) for defect inspection. The FA methods successfully evaluated on few failing samples which were taken from customer return with IDDQ failure range from 50µA until less than 1mA. Concurrently, the spotted excessive emission found on the defective samples during photo localization step indicates of gate oxide defect. The defect well observed with FE-SEM analysis on all tested samples after the physical analysis accomplishment until oxide layer. The proposed technique shows an effective method to compensate the existing FA difficulty on gate oxide defect faced by IC manufacturer in micrometer and nanometer scale technology, which having more metal interconnection layers with higher dense. The proposed technique able to construct promising result compared to the conventional techniques which used in the current FA practice due to certain extends of limitation.
format Thesis
qualification_name Master of Philosophy (M.Phil.)
qualification_level Master's degree
author Abdullah, Farisal
author_facet Abdullah, Farisal
author_sort Abdullah, Farisal
title Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
title_short Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
title_full Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
title_fullStr Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
title_full_unstemmed Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
title_sort technique of failure analysis for gate oxide defect of bi-polar cmos diffuse (bcd) technology
granting_institution Universiti Tun Hussein Onn Malaysia
granting_department Fakulti Kejuruteraan Elektrik dan Elektronik
publishDate 2013
url http://eprints.uthm.edu.my/1902/1/24p%20FARISAL%20ABDULLAH.pdf
http://eprints.uthm.edu.my/1902/2/FARISAL%20ABDULLAH%20COPYRIGHT%20DECLARATION.pdf
http://eprints.uthm.edu.my/1902/3/FARISAL%20ABDULLAH%20WATERMARK.pdf
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