APA (7th ed.) Citation

Lee, S. J. (2018). Design of low power high speed digital vedic multiplier using 13T hybrid full adder.

Chicago Style (17th ed.) Citation

Lee, Shing Jie. Design of Low Power High Speed Digital Vedic Multiplier Using 13T Hybrid Full Adder. 2018.

MLA (8th ed.) Citation

Lee, Shing Jie. Design of Low Power High Speed Digital Vedic Multiplier Using 13T Hybrid Full Adder. 2018.

Warning: These citations may not always be 100% accurate.