A hardware architecture of prewitt edge detection

The objective of this project is to develop a real-time hardware architecture for Prewitt edge detection algorithm. Prewitt edge detection provides differencing operation in the single kernel. Verilog hardware description language was used as the hardware programming language for a real-time edge de...

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书目详细资料
主要作者: Seif, Aramesh
格式: Thesis
语言:English
出版: 2009
主题:
在线阅读:http://eprints.utm.my/id/eprint/18328/1/ArameshSeifMFKE2009.pdf
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总结:The objective of this project is to develop a real-time hardware architecture for Prewitt edge detection algorithm. Prewitt edge detection provides differencing operation in the single kernel. Verilog hardware description language was used as the hardware programming language for a real-time edge detection system. The architecture is capable of operating with a clock frequency of 145 MHz at 550 frames per second. Computation error analysis performed shows that the proposed architecture produces outputs similar to that obtained by software simulation using Matlab.