RTL design of modular arithmetic processor (MAP) core for prime finite field arithmetic, GF(P)
Saved in:
Main Author: | Liew, Meng Wei |
---|---|
Format: | Thesis |
Published: |
2008
|
Subjects: | |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
RTL design of SHA-512 processor core for secure message hashing
by: Chua, Lee Ping
Published: (2008) -
Arithmetic logic unit design for silicon nanowire field-effect transistors logic
by: Mohd. Munir Zahari, Nor Hafizah
Published: (2015) -
Load flow analysis uncertainty treatment via fuzzy arithmetic
by: Ayub, Zatul Akmar
Published: (2009) -
Finite impulse response filter design on distributed arithmetic architecture
by: Abu Zaharin, Muhamad Iqbal
Published: (2012) -
CNFET-based design ternary logic design and arithmetic circuit simulation using HSPICE
by: Ee, Poey Guan
Published: (2015)