Digital modelling test technique for mixed mode circuits
Recent demands in mobile communications, process control, automotive ASICs and smart sensors has accelerated the mixed-signal market and escalated the importance of mixed-signal test development. Mixed-signal circuit or mixed mode circuit is normally tested separately based on their core function. H...
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my-utm-ep.42152018-01-16T04:30:25Z Digital modelling test technique for mixed mode circuits 2005-06 Leong, Mun Hon TK Electrical engineering. Electronics Nuclear engineering Recent demands in mobile communications, process control, automotive ASICs and smart sensors has accelerated the mixed-signal market and escalated the importance of mixed-signal test development. Mixed-signal circuit or mixed mode circuit is normally tested separately based on their core function. However, there is no guarantee that such testing approach would ensure that the system would function perfectly as a single entity. The main objective of this research is to investigate the application of digital modelling testing technique on mixed mode circuits. Digital modelling test technique is a method in which the test vector is simplified as a digital test vector. The investigation examined the suitable defect models as well as test procedures. The research also investigates the effectiveness of employing power supply voltage control (PSVC) testing technique together with the digital modelling. The reason of this test approach is due to independent reports of the effectiveness of these two test techniques. The circuit under test in this work includes a second order Butterworth low pass filter, an ADC and an op-amp. These circuits were chosen to represents a family of mixed – analogue and digital circuits. For comparison purpose, the ADC was tested using code density or histogram test technique. An analysis at bias point is presented to highlight why certain defects are exposed while others are not. The overall results showed that digital modelling test technique is able to model and expose unified analogue and mixed-signal faults. This is supported by the results from testing on discrete and CMOS circuitries. PSVC test coupled with digital model and pulse sampling can increase fault coverage for digital modelling test technique. The main advantages of digital model are it can reduce test time and eliminate circuit partitioning test. 2005-06 Thesis http://eprints.utm.my/id/eprint/4215/ http://eprints.utm.my/id/eprint/4215/1/LeongMunHonMFKE2005.pdf application/pdf en public masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering |
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Universiti Teknologi Malaysia |
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UTM Institutional Repository |
| language |
English |
| topic |
TK Electrical engineering Electronics Nuclear engineering |
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TK Electrical engineering Electronics Nuclear engineering Leong, Mun Hon Digital modelling test technique for mixed mode circuits |
| description |
Recent demands in mobile communications, process control, automotive ASICs and smart sensors has accelerated the mixed-signal market and escalated the importance of mixed-signal test development. Mixed-signal circuit or mixed mode circuit is normally tested separately based on their core function. However, there is no guarantee that such testing approach would ensure that the system would function perfectly as a single entity. The main objective of this research is to investigate the application of digital modelling testing technique on mixed mode circuits. Digital modelling test technique is a method in which the test vector is simplified as a digital test vector. The investigation examined the suitable defect models as well as test procedures. The research also investigates the effectiveness of employing power supply voltage control (PSVC) testing technique together with the digital modelling. The reason of this test approach is due to independent reports of the effectiveness of these two test techniques. The circuit under test in this work includes a second order Butterworth low pass filter, an ADC and an op-amp. These circuits were chosen to represents a family of mixed – analogue and digital circuits. For comparison purpose, the ADC was tested using code density or histogram test technique. An analysis at bias point is presented to highlight why certain defects are exposed while others are not. The overall results showed that digital modelling test technique is able to model and expose unified analogue and mixed-signal faults. This is supported by the results from testing on discrete and CMOS circuitries. PSVC test coupled with digital model and pulse sampling can increase fault coverage for digital modelling test technique. The main advantages of digital model are it can reduce test time and eliminate circuit partitioning test. |
| format |
Thesis |
| qualification_level |
Master's degree |
| author |
Leong, Mun Hon |
| author_facet |
Leong, Mun Hon |
| author_sort |
Leong, Mun Hon |
| title |
Digital modelling test technique for mixed mode circuits |
| title_short |
Digital modelling test technique for mixed mode circuits |
| title_full |
Digital modelling test technique for mixed mode circuits |
| title_fullStr |
Digital modelling test technique for mixed mode circuits |
| title_full_unstemmed |
Digital modelling test technique for mixed mode circuits |
| title_sort |
digital modelling test technique for mixed mode circuits |
| granting_institution |
Universiti Teknologi Malaysia, Faculty of Electrical Engineering |
| granting_department |
Faculty of Electrical Engineering |
| publishDate |
2005 |
| url |
http://eprints.utm.my/id/eprint/4215/1/LeongMunHonMFKE2005.pdf |
| _version_ |
1747814504217968640 |