Hardware acceleration of 2D convolution using systolic array

Hardware acceleration of 2D convolution using systolic array

Two-dimensional convolution is a prevalent mathematical operation used in different areas of digital signal processing such as image processing, video processing and analog signal transmission. The computation intensive nature of 2D convolution operation along with the stringent demand of real-time...

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محفوظ في:

التفاصيل البيبلوغرافية
المؤلف الرئيسي:	Wong, Xue Yuan
التنسيق:	أطروحة
اللغة:	English
منشور في:	2015
الموضوعات:	TK Electrical engineering Electronics Nuclear engineering
الوصول للمادة أونلاين:	http://eprints.utm.my/id/eprint/53576/1/WongXueYuanmfke2015.pdf
الوسوم:	إضافة وسم لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!

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