Modeling and analysis of ballistic carbon nanotube field effect transistor (CNTFET) with quantum transport concept

Aggressive scaling of CMOS has led to higher and higher integration density, the higher performance of devices, low power consumption and more complex function. However, it will eventually reach its limit in future. As device sizes approach the nanoscale, new opportunities arise from harnessing the...

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Bibliographic Details
Main Author: Heng, Chin Chuan
Format: Thesis
Language:English
Published: 2007
Subjects:
Online Access:http://eprints.utm.my/id/eprint/6103/1/HengChinChuanMFKE2007.pdf
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Summary:Aggressive scaling of CMOS has led to higher and higher integration density, the higher performance of devices, low power consumption and more complex function. However, it will eventually reach its limit in future. As device sizes approach the nanoscale, new opportunities arise from harnessing the physical and chemical properties at the nanoscale. Carbon Nanotubes are considered as the most promising carbon nanostructure material is realizing the nanoelectronic transistors back in year 1991. The objective of this project is to create a modeling of next generation field effect transistors (CNTFET) to model the characteristics of the devices. Modeling of semiconductor devices is critical in understanding factors which may affect their performance. This allows greater understanding of the underlying physics and aids optimization in both materials and lowers development costs by reducing the time and effect between design and fabrication of working prototypes. The overall project is uses the concept of a Carbon Nanotube technology along with its application in Carbon Nanotube field effect transistors, physic of Carbon Nanotube, and quantum transport theory to create an equivalent universal SPICE model. Numerical simulation studies are carried out by using MATLAB program to understand the device physic and the performances of transistor are compared with conventional MOSFET. Further analysis has been made on changing some transistor parameter (for example the oxide thickness, carbon nanotube diameter and etc) to further understand what controls and how to improve the transistor performance.