Synthesis and modeling of RF integrated planar spiral inductor

The recent development of the wireless market has increased the interest in the integrated inductor for Radio Frequency Integrated Chip (RFIC) applications. Though Electromagnetic (EM) simulation is available, it is usually expensive, slow and difficult to integrate into the RFIC design flow. Theref...

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Bibliographic Details
Main Author: See, Guan Huei
Format: Thesis
Language:English
Published: 2004
Subjects:
Online Access:http://eprints.utm.my/id/eprint/6147/1/SeeGuanHueiMFKE2004.pdf
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Summary:The recent development of the wireless market has increased the interest in the integrated inductor for Radio Frequency Integrated Chip (RFIC) applications. Though Electromagnetic (EM) simulation is available, it is usually expensive, slow and difficult to integrate into the RFIC design flow. Therefore, the alternative option of a generic, simple yet accurate procedure to design the inductor is very desirable. Based on the physical model, an integrated inductor synthesis procedure has been developed and implemented in Microsoft EXCEL. This synthesis tool is able to identify the maximum quality factor (Q) at the operating frequency (e.g. 1.8 GHz for mobile communication, 2.45 GHz for wireless Local Area Network (LAN)) of the desired inductor very quickly. An example of synthesizing a 3 nH inductor is demonstrated using this tool. Besides that, another type of integrated inductor model known as extracted model is also needed for circuit simulation. An improved model extraction procedure has been proposed in this research and has been embedded in another EXCEL file. This new procedure has reduced the number of terms required and proved to be more accurate even in the region beyond the Self-Resonant Frequency (SRF). The above two types of integrated inductor modeling were then “combined� into a new global integrated inductor model in SPICE, which is a compromise of accuracy (extracted model) and scalability (physical model). This model is accurate up to ~2 GHz, within an average error of 10 %. Using this new model, one can have the freedom to choose the value of inductance and more flexibility in circuit design. In addition, the layout optimization and circuit optimization can be done using the same model thus saving time and reducing cost. This is a novel integrated type of model that has never been published in any other research.