A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process

Photon detection technology involving single photon detection and counting is vital for areas such as biomedical, agriculture, two-dimensional imaging, three-dimensional ranging and fluorescence correlation spectroscopy. These applications require a photon detection system with fast response time an...

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Main Author:	Chong, Yok Kian
Format:	Thesis
Language:	English
Published:	2022
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/99384/1/ChongYokKianMSKE2022.pdf
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spelling	my-utm-ep.993842023-02-27T03:02:34Z A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process 2022 Chong, Yok Kian TK Electrical engineering. Electronics Nuclear engineering Photon detection technology involving single photon detection and counting is vital for areas such as biomedical, agriculture, two-dimensional imaging, three-dimensional ranging and fluorescence correlation spectroscopy. These applications require a photon detection system with fast response time and high sensitivity and Single Photon Avalanche Diode (SPAD) is identified to be a suitable candidate as a photon detector. SPAD provides fast photon counting, low biasing voltage, small in size and ability to integrate with Complementary Metal-Oxide Semiconductors (CMOS) compared with other photon detection methods. The motivation of this project is to achieve physical implementation of 2-Dimensional Array of SPAD with intention of improving sensitivity. Previous studies show limitations of SPAD application to detect very low intensity photon signals due to insufficient sensitivity. This project suggests a robust data acquisition system to work with 16 x 2 photon counting array of SPAD detector and its readout controller module. The integrated circuit will be implemented in Verilog Hardware Descriptive Language (HDL), simulated, synthesized, and tested for Application Specific Integrated Circuit (ASIC) implementation using Synopsys Electronic Design Automation (EDA) tool. Besides that, an additional task is in place to realize fabrication ready physical implementation of the proposed integrated circuit using 0.18 μm CMOS technology. The full design consists of 16 x 2 SPAD model, 16 bits 2 to 1 multiplexer, Brent-Kung Adder (BKA) as data acquisition system and a Parallel In Parallel Out (PIPO) shift register. Verifications are done to each element individually and to whole system to ensure functionality correctness. Physical implementation of the whole system is carried out to study area and power performance of the post-layout design. The 16 x 2 BKA system is able to achieve an area reduction of 20.93 % when taking the 16 x 2 KSA system as reference. The maximum main clock frequency and area consumption achieved by the 16 x 2 BKA system are 680.3 MHz and 11688.97 μm2 respectively. 2022 Thesis http://eprints.utm.my/id/eprint/99384/ http://eprints.utm.my/id/eprint/99384/1/ChongYokKianMSKE2022.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:149998 masters Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering Faculty of Engineering - School of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Chong, Yok Kian A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process
description	Photon detection technology involving single photon detection and counting is vital for areas such as biomedical, agriculture, two-dimensional imaging, three-dimensional ranging and fluorescence correlation spectroscopy. These applications require a photon detection system with fast response time and high sensitivity and Single Photon Avalanche Diode (SPAD) is identified to be a suitable candidate as a photon detector. SPAD provides fast photon counting, low biasing voltage, small in size and ability to integrate with Complementary Metal-Oxide Semiconductors (CMOS) compared with other photon detection methods. The motivation of this project is to achieve physical implementation of 2-Dimensional Array of SPAD with intention of improving sensitivity. Previous studies show limitations of SPAD application to detect very low intensity photon signals due to insufficient sensitivity. This project suggests a robust data acquisition system to work with 16 x 2 photon counting array of SPAD detector and its readout controller module. The integrated circuit will be implemented in Verilog Hardware Descriptive Language (HDL), simulated, synthesized, and tested for Application Specific Integrated Circuit (ASIC) implementation using Synopsys Electronic Design Automation (EDA) tool. Besides that, an additional task is in place to realize fabrication ready physical implementation of the proposed integrated circuit using 0.18 μm CMOS technology. The full design consists of 16 x 2 SPAD model, 16 bits 2 to 1 multiplexer, Brent-Kung Adder (BKA) as data acquisition system and a Parallel In Parallel Out (PIPO) shift register. Verifications are done to each element individually and to whole system to ensure functionality correctness. Physical implementation of the whole system is carried out to study area and power performance of the post-layout design. The 16 x 2 BKA system is able to achieve an area reduction of 20.93 % when taking the 16 x 2 KSA system as reference. The maximum main clock frequency and area consumption achieved by the 16 x 2 BKA system are 680.3 MHz and 11688.97 μm2 respectively.
format	Thesis
qualification_level	Master's degree
author	Chong, Yok Kian
author_facet	Chong, Yok Kian
author_sort	Chong, Yok Kian
title	A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process
title_short	A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process
title_full	A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process
title_fullStr	A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process
title_full_unstemmed	A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process
title_sort	16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm cmos process
granting_institution	Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering
granting_department	Faculty of Engineering - School of Electrical Engineering
publishDate	2022
url	http://eprints.utm.my/id/eprint/99384/1/ChongYokKianMSKE2022.pdf
_version_	1776100594841288704

A 16×2 geiger mode photon counter array automated data acquisition systems in 0.18 μm CMOS Process

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