Area-optimal cache coherent protocol for many-core network-on-chip
Cache coherence support is a major component in network-on-chip (NoC) systems which consist of multiple processing cores or elements as it is essential to ensure that the changes in shared memory are well communicated between all cores. Due to the nature and architecture of NoC, cache coherence prot...
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主要作者: | |
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格式: | Thesis |
語言: | English |
出版: |
2022
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在線閱讀: | http://eprints.utm.my/id/eprint/99547/1/NgWaiKinMSKE2022.pdf |
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