Analytic methods for timing analysis of interconnects in CMOS very large scale integrated circuits /
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Main Author: | |
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Format: | Thesis Book |
Language: | English |
Published: |
1997.
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LEADER | 00908cam a2200241 a 4500 | ||
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001 | u418261 | ||
003 | SIRSI | ||
008 | 971127s1996 si v 00 1 eng m | ||
035 | |a ACE-1982 | ||
040 | |a UMM | ||
090 | |a TK7871.95 |b Yon | ||
100 | 1 | 0 | |a Yong, Alan Kuen Fatt. |
245 | 1 | 0 | |a Analytic methods for timing analysis of interconnects in CMOS very large scale integrated circuits / |c by Alan Yong Kuen Fatt. |
260 | |c 1997. | ||
300 | |a x, 149 leaves : |b ill. ; |c 30 cm. | ||
502 | |a Dissertation (M.Eng.) -- National University of Singapore, 1996. | ||
504 | |a Bibliography: leaves 106-114. | ||
650 | 0 | |a Integrated circuits |x Very large scale integration |x Design | |
650 | 0 | |a Metal oxide semiconductor field-effect transistors. | |
650 | 0 | |a Time measurements. | |
948 | |a 28/11/1997 |b 17/08/1998 | ||
596 | |a 1 | ||
999 | |a TK7871.95 YON |w LC |c 1 |i A506954274 |d 7/9/1999 |l STACKS |m P01UTAMA |n 1 |r Y |s Y |t TESIS |u 24/3/1998 |