Simulation of 0.1um Mos devices for logic and memory technologies /

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Bibliographic Details
Main Author: Poh, Francis Yong Wee
Format: Thesis Book
Language:English
Published: 2002.
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100 1 0 |a Poh, Francis Yong Wee. 
245 1 0 |a Simulation of 0.1um Mos devices for logic and memory technologies /  |c Poh Yong Wee Francis. 
260 |c 2002. 
300 |a xv, 166 leaves :  |b ill. ;  |c 30 cm. 
502 |a Dissertation (M.Eng.) -- National University of Singapore, 2002. 
504 |a Bibliography: leaves 113-137. 
948 |a 12/05/2003  |b 12/05/2003 
596 |a 1 
999 |a TK7 NUS 2002 POH  |w LC  |c 1  |i A511034703  |l B_KOM4  |m P01UTAMA  |r Y  |s Y  |t TESIS  |u 19/5/2003  |o .PUBLIC. BKOM 4 : 45972