Robust VLSI floorplanning by using stochastic and deterministic algorithms /
محفوظ في:
| المؤلف الرئيسي: | |
|---|---|
| التنسيق: | أطروحة كتاب |
| اللغة: | English |
| منشور في: |
2013.
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| الموضوعات: | |
| الوسوم: |
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| LEADER | 01302cam a2200289 a 4500 | ||
|---|---|---|---|
| 001 | u984546 | ||
| 003 | SIRSI | ||
| 005 | 201312031109 | ||
| 008 | 131203s2013 my a t 000 0 eng m | ||
| 040 | |a UMM |d UMJ |e rda | ||
| 090 | |a TK7 |b UMP 2013 Hoo | ||
| 097 | |a TK7 |b UMP 2013 Hoo | ||
| 100 | 1 | |a Hoo, Chyi Shiang. | |
| 245 | 1 | 0 | |a Robust VLSI floorplanning by using stochastic and deterministic algorithms / |c Hoo Chyi Shiang. |
| 260 | |c 2013. | ||
| 300 | |a xxxvii, 391 leaves : |b ill. ; |c 30 cm | ||
| 502 | |a Thesis (Ph.D) -- Jabatan Kejuruteraan Elektrik, Fakulti Kejuruteraan, Universiti Malaya, 2013. | ||
| 504 | |a Bibliography: leaves 366-390 | ||
| 650 | 0 | |a Robust optimization. | |
| 650 | 0 | |a Integrated circuits |x Very large scale integration |x Computer-aided design. | |
| 650 | 0 | |a Integrated circuits |x Very large scale integration |x Mathematical models. | |
| 710 | 2 | |a Universiti Malaya. |b Jabatan Kejuruteraan Elektrik. | |
| 900 | |a ZA | ||
| 596 | |a 1 7 | ||
| 999 | |a TK7 UMP 2013 HOO |w LC |c 1 |i A516149958 |d 12/2/2015 |f 12/2/2015 |g 1 |l STACKS |m P07JURUTER |r N |s Y |t TESIS |u 12/2/2015 | ||
| 999 | |a TK7 UMP 2013 HOO |w LC |c 2 |i A516150647 |d 12/2/2015 |f 12/2/2015 |g 1 |l COUNTER |m P07JURUTER |r N |s Y |t CD |u 12/2/2015 | ||
| 999 | |a TK7 UMP 2013 HOO |w LC |c 1 |i A515706345 |d 27/10/2015 |f 27/10/2015 |g 1 |l STACKS |m P01UTAMA |r Y |s Y |t TESIS |u 20/10/2015 | ||