Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin

Development of interaction circuit for triple data encryption standard (3DES) using verilog for FPGA implementation / Nor Aizee Masyitah Kamal Bahrin

This report presents the development of interfacing circuit for Triple Data Encryption Standard (3DES) that is being designed using Verilog HDL for Field Programmable Gate Array (FPGA) implementation. The purpose of this project is to design the interfacing circuit that can minimize the input/output...

Full description

Saved in:
Bibliographic Details
Main Author: Kamal Bahrin, Nor Aizee Masyitah
Format: Thesis
Language:English
Published: 2006
Subjects:
Electric apparatus and materials
Electric circuits
Electric networks
Online Access:https://ir.uitm.edu.my/id/eprint/102744/1/102744.pdf
Tags: Add Tag
No Tags, Be the first to tag this record!

Internet

https://ir.uitm.edu.my/id/eprint/102744/1/102744.pdf

Similar Items