Evaluation Of 28nm 10 Bit Adc Using Ramp And Sinusoidal Histogram Methodologies
ADC production testing has become more challenging due to more stringent test procedure for new generation of ADC. The trend for silicon cost is going down while the cost of test is going up. Therefore, to reduce the cost of test and preserve the test accuracy is essential for high volume testing in...
محفوظ في:
| المؤلف الرئيسي: | Wan Ismail, Wan Mohd Fahmi |
|---|---|
| التنسيق: | أطروحة |
| اللغة: | English |
| منشور في: |
2015
|
| الموضوعات: | |
| الوصول للمادة أونلاين: | http://eprints.usm.my/40967/1/WAN_MOHD_FAHMI_BIN_WAN_ISMAIL_24_pages.pdf |
| الوسوم: |
إضافة وسم
لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!
|
مواد مشابهة
-
Technique Of Pvt Analysis On Sd Controller Timing Validation For 28nm Soc Fpga
بواسطة: Yusni, Nur Amalina Aiza
منشور في: (2015) -
Design Of Fpga Address Register In 28nm Process Technology Based On Standard Cell Based Approach
بواسطة: Chew , Ming Choo
منشور في: (2013) -
Fingerprint Template Protection With Minutiae Based Bit String
بواسطة: Jin, Zhe
منشور في: (2011) -
Performance Analysis Of Different Hash Functions Using Bloom Filter For Network Intrusion Detection Systems In 32-Bit And 64-Bit Computer Operation Mode.
بواسطة: Tan , Beng Ghee
منشور في: (2016) -
Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
بواسطة: Victor Paulraj, Eric Paulraj
منشور في: (2016)
