Modeling the effect of velocity saturation in nanoscale MOSFET

Modeling the effect of velocity saturation in nanoscale MOSFET

MOSFET scaling throughout the years has enabled us to pack million of MOS transistors on a single chip to keep in pace with Moore’s Law. The introduction of 65 nm and 90 nm process technology offer low power, high-density and highspeed generation of processor with latest technological advancement....

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Main Author: Tan, Michael Loong Peng
Format: Thesis
Language:English
Published: 2006
Subjects:
TK Electrical engineering
Electronics Nuclear engineering
Online Access:http://eprints.utm.my/id/eprint/4593/1/MichaelTanLoongPengMFKE2006.pdf
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spelling my-utm-ep.45932018-02-28T06:41:56Z Modeling the effect of velocity saturation in nanoscale MOSFET 2006-12 Tan, Michael Loong Peng TK Electrical engineering. Electronics Nuclear engineering MOSFET scaling throughout the years has enabled us to pack million of MOS transistors on a single chip to keep in pace with Moore’s Law. The introduction of 65 nm and 90 nm process technology offer low power, high-density and highspeed generation of processor with latest technological advancement. When gate length is scaled into nanoscale regime, second order effects are becoming a dominant issue to be dealt with in transistor design. In short channel devices, velocity saturation has redefined the current-voltage (I-V) curve. New models have been modified and studied to provide a better representation of device performance by understanding the effect of quantum mechanical effect. This thesis studies the effect of velocity saturation on transistor’s internal characteristic and external factor. Velocity saturation dependence on temperature, substrate doping concentration and longitudinal electric field for n-MOSFET are investigated. An existing currentvoltage (I-V) compact model is utilized and modified by appending a simplified threshold voltage derivation and a more precise carrier mobility model. The compact model also includes a semi empirical source drain series resistance modeling. The model can simulate the performance of the device under the influence of velocity saturation. The results obtained can be used as a guideline for future nanoscale MOS development. 2006-12 Thesis http://eprints.utm.my/id/eprint/4593/ http://eprints.utm.my/id/eprint/4593/1/MichaelTanLoongPengMFKE2006.pdf application/pdf en public masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution Universiti Teknologi Malaysia
collection UTM Institutional Repository
language English
topic TK Electrical engineering
Electronics Nuclear engineering
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
Tan, Michael Loong Peng
Modeling the effect of velocity saturation in nanoscale MOSFET
description MOSFET scaling throughout the years has enabled us to pack million of MOS transistors on a single chip to keep in pace with Moore’s Law. The introduction of 65 nm and 90 nm process technology offer low power, high-density and highspeed generation of processor with latest technological advancement. When gate length is scaled into nanoscale regime, second order effects are becoming a dominant issue to be dealt with in transistor design. In short channel devices, velocity saturation has redefined the current-voltage (I-V) curve. New models have been modified and studied to provide a better representation of device performance by understanding the effect of quantum mechanical effect. This thesis studies the effect of velocity saturation on transistor’s internal characteristic and external factor. Velocity saturation dependence on temperature, substrate doping concentration and longitudinal electric field for n-MOSFET are investigated. An existing currentvoltage (I-V) compact model is utilized and modified by appending a simplified threshold voltage derivation and a more precise carrier mobility model. The compact model also includes a semi empirical source drain series resistance modeling. The model can simulate the performance of the device under the influence of velocity saturation. The results obtained can be used as a guideline for future nanoscale MOS development.
format Thesis
qualification_level Master's degree
author Tan, Michael Loong Peng
author_facet Tan, Michael Loong Peng
author_sort Tan, Michael Loong Peng
title Modeling the effect of velocity saturation in nanoscale MOSFET
title_short Modeling the effect of velocity saturation in nanoscale MOSFET
title_full Modeling the effect of velocity saturation in nanoscale MOSFET
title_fullStr Modeling the effect of velocity saturation in nanoscale MOSFET
title_full_unstemmed Modeling the effect of velocity saturation in nanoscale MOSFET
title_sort modeling the effect of velocity saturation in nanoscale mosfet
granting_institution Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department Faculty of Electrical Engineering
publishDate 2006
url http://eprints.utm.my/id/eprint/4593/1/MichaelTanLoongPengMFKE2006.pdf
_version_ 1747814537779740672

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