High speed – energy efficient successive approximation analog to digital converter using tri-level switching
This thesis reports issues and design methods used to achieve high-speed and high-resolution Successive Approximation Register analog to digital converters (SAR ADCs). A major drawback of this technique relates to the mismatch in the binary ratios of capacitors which causes nonlinearity. Another iss...
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| Format: | Thesis |
| Language: | English |
| Published: |
2015
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| Online Access: | http://eprints.utm.my/id/eprint/77897/1/SaharSarafiPFKE2015.pdf |
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